Nonvolatile random access memories such as a magnetic random access memory have been researched and developed as memories for replacing volatile memories such as a DRAM and SRAM.
To reduce the development cost and perform smooth replacement, it is desirable to operate the nonvolatile random access memories by using the same specifications as those of the DRAM and SRAM. It is also possible to achieve low power consumption and normally-off computing by using the nonvolatile random access memories by, e.g., increasing the number of banks forming a memory cell array and minimizing the number of banks to be activated among these banks.
If the number of banks forming the memory cell array increases, however, the number of bits of an address for selecting each of these banks also increases. To achieve the same specifications as those of a versatile DRAM and SRAM as described above, it is necessary to construct a system in which the number of pins does not increase and the operating speed does not decrease even when the number of bits of an address increases.